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| WS27C010L Military 128K x 8 CMOS EPROM KEY FEATURES * High Performance CMOS -- 90 ns Access Time * DESC SMD No. 5962-89614 * Compatible with JEDEC 27010 and 27C010 EPROMs * Fast Programming * EPI Processing -- Latch-Up Immunity to 200 mA -- ESD Protection Exceeds 2000 Volts * JEDEC Standard Pin Configuration -- 32 Pin CERDIP Package -- 32 Pin Leadless Chip Carrier (CLLCC) GENERAL DESCRIPTION The WS27C010L is a performance oriented 1 Meg UV Erasable Electrically Programmable Read Only Memory organized as 128K words x 8 bits/word. It is manufactured using an advanced CMOS technology which enables it to operate at data access times as fast as 120 nsecs. The memory was designed utilizing WSI's patented self-aligned split gate EPROM cell, resulting in a low power device with a very cost effective die size. The WS27C010L 1 Meg EPROM provides extensive code store capacity for microprocessor, DSP, and microcontroller-based systems. Its 120 nsec access time over the full Military temperature range provides the potential of no-wait state operation. And where this parameter is important, the WS27C010L provides the user with a very fast 35 nsec TOE output enable time. The WS27C010L is offered in both a 32 pin 600 mil CERDIP, and a 32 pad Ceramic Leadless Chip Carrier (CLLCC) for surface mount applications. Its standard JEDEC EPROM pinouts provide for automatic upgrade density paths for existing 128K and 256K EPROM users. PIN CONFIGURATION TOP VIEW Chip Carrier A12 A15 A16 VPP VCC PGM NC VPP A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 O0 O1 O2 GND CERDIP 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VCC PGM NC A14 A13 A8 A9 A11 OE A10 CE O7 O6 O5 O4 O3 A7 A6 A5 A4 A3 A2 A1 A0 O0 432 32 31 30 1 5 29 6 28 7 27 8 26 9 25 10 24 11 23 12 22 13 21 14 15 16 17 18 19 20 O1 O2 GND A14 A13 A8 A9 A11 OE A10 CE O7 O3 O4 O5 O6 PRODUCT SELECTION GUIDE PARAMETER Address Access Time (Max) Chip Select Time (Max) Output Enable Time (Max) 27C010L-90 90 ns 90 ns 35 ns 27C010L-12 120 ns 120 ns 35 ns 27C010L-15 150 ns 150 ns 40 ns 27C010L-17 170 ns 170 ns 40 ns 27C010L-20 200 ns 200 ns 40 ns Return to Main Menu 4-25 WS27C010L ABSOLUTE MAXIMUM RATINGS* Storage Temperature............................-65 to + 150C Voltage on any Pin with Respect to Ground ....................................-0.6V to +7V VPP with Respect to Ground...................-0.6V to + 14V VCC Supply Voltage with Respect to Ground ....................................-0.6V to +7V ESD Protection ..................................................>2000V *NOTICE: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect device reliability. OPERATING RANGE RANGE Military TEMPERATURE -55C to +125C VCC +5V 10% DC READ CHARACTERISTICS Over Operating Range. (See Above) SYMBOL VIL VIH VOL VOH ISB1 ISB2 ICC IPP VPP ILI ILO PARAMETER Input Low Voltage Input High Voltage Output Low Voltage Output High Voltage IOL = 2.1 mA IOH = -400 A CE = VIH CE = OE = VIL (Note 1) VPP = VCC VCC -0.4 VIN = 5.5 V or Gnd VOUT = 5.5 V or Gnd -10 -10 F = 5 MHz F = 8 MHz 3.5 100 1 50 60 100 VCC 10 10 TEST CONDITIONS MIN -0.5 2.0 MAX 0.8 VCC + 1 0.4 UNITS V V V V A mA mA mA A V A A VCC Standby Current (CMOS) CE = VCC 0.3 V (Note 2) VCC Standby Current VCC Active Current (TTL) VPP Supply Current VPP Read Voltage Input Leakage Current Output Leakage Current NOTES: 1. The supply current is the sum of ICC and IPP. The maximum current value is with Outputs O 0 to O 7 unloaded. 2. CMOS inputs: VIL = GND 0.3V, VIH = VCC 0.3 V. AC READ CHARACTERISTICS Over Operating Range with VPP = VCC. SYMBOL tACC tCE tOE tDF PARAMETER Address to Output Delay CE to Output Delay OE to Output Delay Output Disable to Output Float (Note 3) Output Hold from Addresses, CE or OE, Whichever Occurred First (Note 3) 0 -90 MIN MAX MIN -12 MAX MIN -15 MAX MIN -17 MAX MIN -20 MAX UNITS 90 90 35 35 120 120 35 35 150 150 40 40 170 170 40 40 200 200 40 40 ns tOH 0 0 0 0 NOTE: 3. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven - see timing diagram. 4-26 WS27C010L AC READ TIMING DIAGRAM VIH ADDRESSES VIL ADDRESS VALID VIH CE VIL tCE VIH OE VIL tACC VIH OUTPUT VIL HIGH Z tDF tOE (4) (5) (4) tOH VALID OUTPUT HIGH Z NOTE: 4. OE may be delayed up to t CE - t OE after the falling edge of CE without impact on t CE. CAPACITANCE (5) TA = 25C, f = 1 MHz SYMBOL C IN C OUT C VPP PARAMETER Input Capacitance Output Capacitance VPP Capacitance CONDITIONS VIN = 0V VOUT = 0V VPP = 0 V TYP (6) 4 8 18 MAX 6 12 25 UNITS pF pF pF NOTES: 5. This parameter is only sampled and is not 100% tested. 6. Typical values are for TA = 25C and nominal supply voltages. TEST LOAD (High Impedance Test Systems) A.C. TESTING INPUT/OUTPUT WAVEFORM 820 2.01 V D.U.T. 2.4 2.0 0.8 TEST POINTS 2.0 0.8 100 pF (INCLUDING SCOPE AND JIG CAPACITANCE) 0.4 A.C. testing inputs are driven at 2.4 V for a logic "1" and 0.4 V for a logic "0." Timing measurements are made at 2.0 V for a logic "1" and 0.8 V for a logic "0". NOTE: 7. Provide adequate decoupling capacitance as close as possible to this device to achieve the published A.C. and D.C. parameters. A 0.1 microfarad capacitor in parallel with a 0.01 microfarad capacitor connected between VCC and ground is recommended. Inadequate decoupling may result in access time degradation or other transient performance failures. 4-27 WS27C010L PROGRAMMING INFORMATION DC CHARACTERISTICS (TA = 25 5C, VCC = 6.25 0.25 V, VPP = 12.75 0.25 V. See Notes 8, 9 and 10) SYMBOLS ILI IPP ICC VIL VIH VOL VOH PARAMETER Input Leakage Current (VIN = VCC or Gnd) VPP Supply Current During Programming Pulse (CE = PGM = VIL ) VCC Supply Current Input Low Voltage Input High Voltage Output Low Voltage During Verify (IOL = 2.1 mA) Output High Voltage During Verify (IOH = -400 A) 3.5 -0.1 2.0 MIN -10 MAX 10 60 50 0.8 VCC + 0.3 0.4 UNITS A mA mA V V V V NOTES: 8. VCC must be applied either coincidentally or before VPP and removed either coincidentally or after VPP. 9. VPP must not be greater than 14 volts including overshoot. During CE = PGM = VIL, VPP must not be switched from 5 volts to 12.75 volts or vice-versa. 10. During power up the PGM pin must be brought high ( VIH) either coincident with or before power is applied to VPP. AC CHARACTERISTICS (TA = 25 5C, VCC = 6.25 0.25 V, VPP = 12.75 0.25 V) SYMBOLS tAS tOES tOS tAH tOH tDF tOE t VS /t CES tPW PARAMETER Address Setup Time Output Enable Setup Time Data Setup Time Address Hold Time Data Hold Time Chip Disable to Output Float Delay Data Valid From Output Enable VPP Setup Time/CE Setup Time PGM Pulse Width 2 0.1 3 4 MIN 2 2 2 0 2 0 55 55 TYP MAX UNITS s s s s s ns ns s ms PROGRAMMING WAVEFORM ADDRESSES tAS DATA tOS VPP VPP VCC VIH CE VIL VIH PGM VIL tPW VIH OE VIL tCES tVS DATA IN STABLE ADDRESS STABLE tAH HIGH Z tOH tOE DATA OUT VALID tDF tOES 4-28 WS27C010L MODE SELECTION The modes of operation of the WS27C010L are listed below. A single 5 V power supply is required in the read mode. All inputs are TTL levels except for VPP and A 9 for device signature. MODE Read Output Disable Standby Programming Program Verify Program Inhibit Signature Manufacturer (13) Device(13) PINS CE VIL X VIH VIL VIL VIH VIL VIL OE VIL VIH X VIH VIL X VIL VIL PGM X (11) X X VIL VIH X X X A9 X X X X X X VH(12) VH(12) A0 X X X X X X VIL VIH VPP X X X VPP(12) VPP(12) VPP(12) X X VCC 5.0 V 5.0 V 5.0 V 6.0 V 6.0 V 5.0 V 5.0 V 5.0 V OUTPUTS DOUT High Z High Z DIN DOUT High Z 23 H C1 H NOTES: 11. X can be VIL or VIH. 12. VH = VPP = 12.75 0.25 V. 13. A1 - A8, A10 - A16 = VIL. ORDERING INFORMATION PART NUMBER WS27C010L-12CMB* WS27C010L-12DMB* WS27C010L-15CMB WS27C010L-15DMB WS27C010L-17CMB* WS27C010L-17DMB* WS27C010L-20CMB* WS27C010L-20DMB* SPEED (ns) 120 120 150 150 170 170 200 200 PACKAGE TYPE 32 Pad CLLCC 32 Pin CERDIP, 0.6" 32 Pad CLLCC 32 Pin CERDIP, 0.6" 32 Pad CLLCC 32 Pin CERDIP, 0.6" 32 Pad CLLCC 32 Pin CERDIP, 0.6" WSI PACKAGE OPERATING TEMPERATURE MANUFACTURING DRAWING RANGE PROCEDURE C2 D4 C2 D4 C2 D4 C2 D4 Military Military Military Military Military Military Military Military MIL-STD-883C MIL-STD-883C MIL-STD-883C MIL-STD-883C MIL-STD-883C MIL-STD-883C MIL-STD-883C MIL-STD-883C NOTE: 14. The actual part marking will not include the initials "WS." *SMD product. See page 4-2 for SMD number. PROGRAMMING/ALGORITHMS/ERASURE/PROGRAMMERS REFER TO PAGE 5-1 The WS27C010L is programmed using Algorithm E shown on page 5-11. (This product can also be programmed by using National Semiconductor's 27C010 Programming Algorithm.) Return to Main Menu 4-29 |
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